A research paper by Intelligent Circuit, Architecture, and System Laboratory (iCAS Lab) at Shanghai Jiao Tong University Global College (SJTUGC, abbreviated as GC hereafter) has received the 2026 IEEE Circuits and Systems Society (CASS) Outstanding Young Author Award, one of the society’s most prestigious paper honors. The award was announced during the 2026 IEEE International Symposium on Circuits and Systems (ISCAS), the flagship conference of the IEEE Circuits and Systems Society, held in Shanghai from May 24 to 27.
The award-winning paper, titled “Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs,” was published in the IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS). Associate Professor Xinfei Guo served as the corresponding author. The first author is Ph.D. student Runxi Wang. Co-authors include undergraduate alumnus Ziheng Wang, Ph.D. student Ting Lin, and Master’s student Jacob Raby.
The IEEE Circuits and Systems Society Outstanding Young Author Award is one of the flagship best paper awards presented by the IEEE Circuits and Systems Society and is also recognized as one of the prestigious awards in the integrated circuits field. The award is selected from papers published within the past two years in all journals sponsored by the Society, including IEEE Transactions on Circuits and Systems I, IEEE Transactions on Circuits and Systems II, IEEE Journal on Emerging and Selected Topics in Circuits and Systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE Transactions on Circuits and Systems for Artificial Intelligence, IEEE Transactions on Biomedical Circuits and Systems, and IEEE Transactions on Circuits and Systems for Video Technology. Candidate papers are nominated and shortlisted before the final selection is made through voting by the Society’s Awards Committee. The award is presented annually. To be eligible, the first author must be under 30 years old at the time of publication. The award aims to recognize highly innovative and influential research contributions in the field of circuits and systems. Only one paper worldwide is selected to receive this award each year.
The rapid advancement of three-dimensional integrated circuits (3DICs) has heightened the need for early-phase design space exploration (DSE) to minimize design iterations and unexpected challenges. Emphasizing the pre-register-transfer level (Pre-RTL) design phase is crucial for reducing trial-and error costs. However, 3DIC design introduces additional complexities due to thermal constraints and an expanded design space resulting from vertical stacking and various cooling strategies. Despite this need, existing Pre-RTL DSE tools for 3DICs remain scarce, with available solutions often lacking comprehensive design options and full customization support.
To address these challenges, the GC research team developed Cool-3D, an end-to-end, thermal-aware framework for 3DIC design that integrates mainstream architectural-level simulators, including gem5, McPAT, and HotSpot 7.0, with advanced cooling models. Cool-3D enables broad and fine-grained design space exploration, built-in microfluidic cooling support for thermal analysis, and an extension interface for non-parameterizable customization, allowing designers to model and optimize 3DIC architectures with greater flexibility and accuracy. The framework has been open-sourced at https://github.com/iCAS-SJTU/Cool-3D.
Author Introduction
Runxi Wang is currently pursuing the Ph.D. degree at GC. She received the B.E. degree in Electrical and Computer Engineering from Shanghai Jiao Tong University in 2023. Her current research interests include compute-in-memory and reconfigurable computing. She is currently the vice chair of the IEEE CASS SJTU Student Branch Chapter.
Ziheng Wang is currently pursuing the M.S. degree in Electrical Engineering and Information Systems in the University of Tokyo. He received the B.E. degree in Electrical and Computer Engineering from GC in 2025. His current research interests include hardware acceleration for AI and 3D IC.
Ting Lin is currently pursuing the Ph.D. degree at GC. She received the B.E. degree from Shanghai Jiao Tong University in 2025. Her current research interests include hardware support and compiler-architecture co-design for large language models.
Jacob Michael Raby is currently pursuing the M.S. degree in Electronic Science and Technology at GC. He received a B.S. degree in Computer Engineering and B.A. degree in Chinese from the University of Mississippi, Oxford, MS, USA, in 2024. His research interests include software-hardware co-design, embedded systems, and artificial intelligence.
Xinfei Guo is an Associate Professor at GC. His research interests include hardware-software co-design for edge intelligence, highly reliable and energy-efficient architecture and circuit design, and digital backend EDA technologies. He received his Ph.D. degree from University of Virginia, his M.S. degree from University of Florida, and his B.S. degree from Xidian University. He has been recognized with honors including the Shanghai Overseas High-Level Talent Program, Forbes China 100 Young Returned Overseas Chinese Elites, the pre-doctoral scholarship from the IEEE Circuits and Systems Society, as well as best paper or special-session awards at conferences such as IEEE SOCC 2022 and IEEE LASCAS 2019. He currently serves as Associate Editor-in-Chief of IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Distinguished Lecturer of the IEEE Circuits and Systems Society, and Associate Editor of Integration, the VLSI Journal. He also serves as General Chair of MCSoC 2026, Publication Chair of AICAS 2026, and Technical Program Co-Chair of ISICAS 2025. He is a Senior Member of IEEE, ACM, and CCF.
